PCI express

PCIe 1.1 / 2.0 / 3.0 Trigger & Decode

The R&S®RTO6 and R&S®RTP oscilloscopes support triggering and decoding of PCI Express Gen 1.1 and 2.0 signals. In addition, the R&S®RTP supports Gen 3.0 signals. Users can set up decoding in seconds via the intuitive menu dialogs. For detailed analysis, results can be viewed as color-coded telegrams and/or in a table. Errors and other protocol-specific fields, such as TLP and OS are identified efficiently using the oscilloscopes' protocol trigger. 

Fast bus setup

From the app cockpit, any protocol can be configured in only a few steps. Once the desired generation/bus speed has been chosen, the relevant channels selected and the correct levels set, decoding begins automatically. For PCI Express, a link size of up to 4 can be decoded simultaneously. 

Display as color-coded bus

Efficiently analyze the decoded bus frames by overlaying the time domain signal with PCIe color-coded packets. Messages can be displayed in hex, bin and ASCII format. Users have the choice to display the data in a concise table or with all detailed information. The flexible screen setup ensures you always have an excellent overview. 

Strong trigger capability

Trigger on specific PCIe packets, data and errors

The protocol-specific trigger lets you reliably isolate protocol events and errors. High acquisition rates make Rohde & Schwarz oscilloscopes ideal for finding errors quickly. Protocol-specific trigger results can then be decoded. For PCIe, this allows users to trigger on specific OS (SKP OS, Training Seq, etc.), DLLP (ACK, Vendor, etc.), TLP (Mem, IO, etc.) and errors (CRC16, LCRC, etc.).

Powerful search and navigation capabilities

Comprehensive search functions simplify the analysis of long signal sequences. You can search for waveforms based on various criteria, such as signal faults and protocol content. All detected events are shown in a table with timestamps. The individual events can be examined in a zoom window with simple navigation between events.

Reliable decoding

The protocol dialog gives users additional settings to help ensure stable and reliable decoding. For example with PCIe Gen 1.1/2.0, the CDR/PLL settings can be fine-tuned to the captured signal. For Gen 3, RX equalization settings such as CTLE and DFE are built-in.